From 7c9753c8ce0805e20f6c2899d4236533c2307f82 Mon Sep 17 00:00:00 2001 From: Raymond Chung Date: Thu, 24 Nov 2022 15:04:14 +0800 Subject: mb/google/brya/var/gaelin: Add camera module settings Modify USB2.0 port[4] settings to support camera. BUG=b:238252678 BRANCH=firmware-brya-14505.B TEST=with brask overlay changes, camera in camera app works Change-Id: I42325b75e129429ee451ded6a2086fd3808e581a Signed-off-by: Raymond Chung Reviewed-on: https://review.coreboot.org/c/coreboot/+/69963 Tested-by: build bot (Jenkins) Reviewed-by: Derek Huang Reviewed-by: Nick Vaccaro --- src/mainboard/google/brya/variants/gaelin/gpio.c | 4 ++-- src/mainboard/google/brya/variants/gaelin/overridetree.cb | 9 +++++++++ 2 files changed, 11 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/brya/variants/gaelin/gpio.c b/src/mainboard/google/brya/variants/gaelin/gpio.c index a20e3852ae..1438975b25 100644 --- a/src/mainboard/google/brya/variants/gaelin/gpio.c +++ b/src/mainboard/google/brya/variants/gaelin/gpio.c @@ -10,7 +10,7 @@ static const struct pad_config override_gpio_table[] = { /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* A17 : DISP_MISCC ==> EN_FCAM_PWR */ - PAD_CFG_GPO(GPP_A17, 0, DEEP), + PAD_CFG_GPO(GPP_A17, 1, DEEP), /* A19 : DDSP_HPD1 ==> NC */ PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> NC */ @@ -62,7 +62,7 @@ static const struct pad_config override_gpio_table[] = { /* E5 : SATA_DEVSLP1 ==> USB_A1_RT_RST_ODL */ PAD_CFG_GPO(GPP_E5, 1, DEEP), /* E7 : PROC_GP1 ==> EN_MIC_PWR */ - PAD_CFG_GPO(GPP_E7, 0, DEEP), + PAD_CFG_GPO(GPP_E7, 1, DEEP), /* E14 : DDSP_HPDA ==> EDP_HPD */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* E15 : RSVD_TP ==> PCH_WP_OD */ diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb index dcb695fde9..57079f3d69 100644 --- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb +++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb @@ -2,6 +2,7 @@ chip soc/intel/alderlake register "usb2_ports[2]" = "USB2_PORT_EMPTY" register "usb2_ports[3]" = "USB2_PORT_EMPTY" + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # UFCamera register "usb3_ports[2]" = "USB3_PORT_EMPTY" register "usb3_ports[3]" = "USB3_PORT_EMPTY" @@ -100,6 +101,14 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on end end + chip drivers/usb/acpi + register "desc" = ""UFCamera"" + register "type" = "UPC_TYPE_INTERNAL" + register "has_power_resource" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A17)" + register "enable_delay_ms" = "20" + device ref usb2_port5 on end + end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A3 (MLB)"" register "type" = "UPC_TYPE_A" -- cgit v1.2.3