From 74427cc554ec5f8b0631d0cdb789f193a62a343f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Tue, 11 Dec 2018 15:16:28 +0100 Subject: mb/google/kahlee/liara: Document why IOMMU is disabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit d80884ea5a ("mb/google/kahlee: Disable IOMMU") disabled the IOMMU in all kahlee variants, but omitted the explaining comment only in liara's devicetree.cb. Copy this comment to liara. Change-Id: I564013a16217445003467e2a0579abd50597b205 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/c/30166 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Patrick Georgi --- src/mainboard/google/kahlee/variants/liara/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/devicetree.cb index eef984a6d7..bc6c6434e4 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/devicetree.cb @@ -60,7 +60,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 off end # IOMMU + device pci 0.2 off end # IOMMU (Disabled for performance and battery) device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge -- cgit v1.2.3