From 718a3cba252b39068d8bccd988d602065ad4ca65 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 12 Oct 2021 21:39:47 +0200 Subject: mb/google/guybrush/bootblock: drop redundant clearing of LPC decodes The writes were originally added due to being part of the initialization sequence in the reference code, but coreboot already has those registers cleared by the time we reach this part of the code, so we can drop these redundant writes. Signed-off-by: Felix Held Change-Id: I43344460e5355664841d77daf1df3fd386e047e9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58341 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/mainboard/google/guybrush/bootblock.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c index 040bc52441..4a0d384660 100644 --- a/src/mainboard/google/guybrush/bootblock.c +++ b/src/mainboard/google/guybrush/bootblock.c @@ -39,8 +39,11 @@ void bootblock_mainboard_early_init(void) dword |= LPC_LDRQ0_PD_EN; pci_write_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS, dword); - pci_write_config32(SOC_LPC_DEV, LPC_IO_PORT_DECODE_ENABLE, 0); - pci_write_config32(SOC_LPC_DEV, LPC_IO_OR_MEM_DECODE_ENABLE, 0); + /* + * All LPC decodes need to be cleared before we can configure the LPC pads as secondary + * eSPI interface that gets used for the EC communication. This is already done by + * lpc_disable_decodes that gets called before this function. + */ if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) return; -- cgit v1.2.3