From 67d099a7f242bcbadfdfaefc0d4680bec4caabb6 Mon Sep 17 00:00:00 2001 From: Eric Lai Date: Thu, 8 Apr 2021 11:56:15 +0800 Subject: mb/google/mancomb: Temporary fix to set eSPI mux BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai Change-Id: Ief59bdea392ab3f141ccf7444c608aef99701d2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52176 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/google/mancomb/bootblock.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/mancomb/bootblock.c b/src/mainboard/google/mancomb/bootblock.c index 11391efd1e..dd38c34f37 100644 --- a/src/mainboard/google/mancomb/bootblock.c +++ b/src/mainboard/google/mancomb/bootblock.c @@ -1,15 +1,37 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include +#include +#include void bootblock_mainboard_early_init(void) { size_t num_gpios; + uint32_t dword; const struct soc_amd_gpio *gpios; if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { gpios = variant_early_gpio_table(&num_gpios); program_gpios(gpios, num_gpios); } + + printk(BIOS_DEBUG, "Bootblock configure eSPI\n"); + + dword = pci_read_config32(SOC_LPC_DEV, 0x78); + dword &= 0xFFFFF9F3; + dword |= 0x200; + pci_write_config32(SOC_LPC_DEV, 0x78, dword); + pci_write_config32(SOC_LPC_DEV, 0x44, 0); + pci_write_config32(SOC_LPC_DEV, 0x48, 0); + + dword = pm_read32(0x90); + dword |= 1 << 16; + pm_write32(0x90, dword); + + dword = pm_read32(0x74); + dword |= 3 << 10; + pm_write32(0x74, dword); } -- cgit v1.2.3