From 42b0e8f4382fc872ee07af0568dbda75602aa251 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 26 Jun 2020 18:03:53 +0200 Subject: soc/amd/picasso/soc_util: rework reduced I/O chip detection Both Dali and Pollock chips have less PCIe, USB3 and DisplayPort connectivity. While Dali can either be fused-down PCO or RV2 silicon, Pollock is always RV2 silicon. Since we have all boards using this code in tree right now, soc_is_dali() can be renamed and generalized to soc_is_reduced_io_sku(). Change-Id: I9eb57595da6f806305552128b0c077ceeb7c4661 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/42833 Reviewed-by: Angel Pons Reviewed-by: Rob Barnes Tested-by: build bot (Jenkins) --- .../google/zork/variants/baseboard/fsps_baseboard_trembyle.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c index f5f4842ed0..df42f6b87e 100644 --- a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c @@ -114,7 +114,7 @@ static const fsp_pcie_descriptor dali_pcie_descriptors[] = { const fsp_pcie_descriptor *baseboard_get_pcie_descriptors(size_t *num) { /* Type 2 or Type 1 fused like Type 2. */ - if (soc_is_dali()) { + if (soc_is_reduced_io_sku()) { *num = ARRAY_SIZE(dali_pcie_descriptors); return dali_pcie_descriptors; } else { @@ -176,7 +176,7 @@ static const fsp_ddi_descriptor dali_ddi_descriptors[] = { const fsp_ddi_descriptor *baseboard_get_ddi_descriptors(size_t *num) { /* Type 2 or Type 1 fused like Type 2. */ - if (soc_is_dali()) { + if (soc_is_reduced_io_sku()) { *num = ARRAY_SIZE(dali_ddi_descriptors); return dali_ddi_descriptors; } else { -- cgit v1.2.3