From 3200976c1e5d7385d51d01a71573a259272a88a3 Mon Sep 17 00:00:00 2001 From: Jarried Lin Date: Thu, 28 Dec 2023 12:08:03 +0800 Subject: mb/google/rauru: Add MediaTek MT8196 reference board Add mainboard folder and drivers for new reference board 'Rauru'. TEST=saw the coreboot uart log to bootblock BUG=b:317009620 Signed-off-by: Jarried Lin Change-Id: I789b622dcda999635f7aa2ce40adea6db28afa0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/83573 Reviewed-by: Yidi Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/mainboard/google/rauru/Kconfig | 30 ++++++++++++++++++++ src/mainboard/google/rauru/Kconfig.name | 6 ++++ src/mainboard/google/rauru/Makefile.mk | 11 ++++++++ src/mainboard/google/rauru/board_info.txt | 6 ++++ src/mainboard/google/rauru/bootblock.c | 8 ++++++ src/mainboard/google/rauru/chromeos.c | 8 ++++++ src/mainboard/google/rauru/chromeos.fmd | 46 +++++++++++++++++++++++++++++++ src/mainboard/google/rauru/devicetree.cb | 5 ++++ src/mainboard/google/rauru/mainboard.c | 18 ++++++++++++ src/mainboard/google/rauru/memlayout.ld | 3 ++ src/mainboard/google/rauru/reset.c | 8 ++++++ src/mainboard/google/rauru/romstage.c | 8 ++++++ 12 files changed, 157 insertions(+) create mode 100644 src/mainboard/google/rauru/Kconfig create mode 100644 src/mainboard/google/rauru/Kconfig.name create mode 100644 src/mainboard/google/rauru/Makefile.mk create mode 100644 src/mainboard/google/rauru/board_info.txt create mode 100644 src/mainboard/google/rauru/bootblock.c create mode 100644 src/mainboard/google/rauru/chromeos.c create mode 100644 src/mainboard/google/rauru/chromeos.fmd create mode 100644 src/mainboard/google/rauru/devicetree.cb create mode 100644 src/mainboard/google/rauru/mainboard.c create mode 100644 src/mainboard/google/rauru/memlayout.ld create mode 100644 src/mainboard/google/rauru/reset.c create mode 100644 src/mainboard/google/rauru/romstage.c (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/rauru/Kconfig b/src/mainboard/google/rauru/Kconfig new file mode 100644 index 0000000000..675dc1c9b1 --- /dev/null +++ b/src/mainboard/google/rauru/Kconfig @@ -0,0 +1,30 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# Umbrella option to be selected by variant boards. +config BOARD_GOOGLE_RAURU_COMMON + def_bool BOARD_GOOGLE_RAURU + +if BOARD_GOOGLE_RAURU_COMMON + +config VBOOT + select VBOOT_VBNV_FLASH + select VBOOT_NO_BOARD_SUPPORT + select VBOOT_MOCK_SECDATA + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SOC_MEDIATEK_MT8196 + select BOARD_ROMSIZE_KB_8192 + select MAINBOARD_HAS_CHROMEOS + select COMMON_CBFS_SPI_WRAPPER + select SPI_FLASH + select SPI_FLASH_INCLUDE_ALL_DRIVERS + +config MAINBOARD_DIR + string + default "google/rauru" + +config MAINBOARD_PART_NUMBER + string + default "Rauru" if BOARD_GOOGLE_RAURU +endif diff --git a/src/mainboard/google/rauru/Kconfig.name b/src/mainboard/google/rauru/Kconfig.name new file mode 100644 index 0000000000..ff103e60e3 --- /dev/null +++ b/src/mainboard/google/rauru/Kconfig.name @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only + +comment "Rauru" + +config BOARD_GOOGLE_RAURU + bool "-> Rauru" diff --git a/src/mainboard/google/rauru/Makefile.mk b/src/mainboard/google/rauru/Makefile.mk new file mode 100644 index 0000000000..d5eb8afc61 --- /dev/null +++ b/src/mainboard/google/rauru/Makefile.mk @@ -0,0 +1,11 @@ +## SPDX-License-Identifier: GPL-2.0-only + +all-y += memlayout.ld +all-y += chromeos.c +all-y += reset.c + +bootblock-y += bootblock.c + +romstage-y += romstage.c + +ramstage-y += mainboard.c diff --git a/src/mainboard/google/rauru/board_info.txt b/src/mainboard/google/rauru/board_info.txt new file mode 100644 index 0000000000..4b860438b3 --- /dev/null +++ b/src/mainboard/google/rauru/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Rauru MediaTek MT8196 reference board +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: y diff --git a/src/mainboard/google/rauru/bootblock.c b/src/mainboard/google/rauru/bootblock.c new file mode 100644 index 0000000000..97d363f2f2 --- /dev/null +++ b/src/mainboard/google/rauru/bootblock.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +void bootblock_mainboard_init(void) +{ + /* TODO: add mainboard init for bootblock */ +} diff --git a/src/mainboard/google/rauru/chromeos.c b/src/mainboard/google/rauru/chromeos.c new file mode 100644 index 0000000000..4555b90ca0 --- /dev/null +++ b/src/mainboard/google/rauru/chromeos.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + /* TODO: add ChromeOS specific gpios */ +} diff --git a/src/mainboard/google/rauru/chromeos.fmd b/src/mainboard/google/rauru/chromeos.fmd new file mode 100644 index 0000000000..5b2234d39e --- /dev/null +++ b/src/mainboard/google/rauru/chromeos.fmd @@ -0,0 +1,46 @@ +# Firmware Layout Description for ChromeOS. +# +# The size and address of every section must be aligned to at least 4K, except: +# RO_FRID, RW_FWID*, GBB, or any unused / padding / CBFS type sections. +# +# 'FMAP' may be found by binary search so its starting address should be better +# aligned to larger values. +# +# For sections to be preserved on update, add (PRESERVE) to individual sections +# instead of a group section; otherwise the preserved data may be wrong if you +# resize or reorder sections inside a group. + +FLASH@0x0 8M { + WP_RO@0x0 4M { + RO_SECTION { + BOOTBLOCK 128K + FMAP 4K + COREBOOT(CBFS) + GBB 0x2f00 + RO_FRID 0x100 + } + RO_GSCVD 8K + RO_VPD(PRESERVE) 32K # At least 16K. + } + RW_SECTION_A 1500K { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 0x100 + } + RW_MISC 36K { + RW_VPD(PRESERVE) 16K # At least 8K. + RW_NVRAM(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 8K + RW_ELOG(PRESERVE) 4K # ELOG driver hard-coded size in 4K. + } + RW_SECTION_B 1500K { + VBLOCK_B 8K + FW_MAIN_B(CBFS) + RW_FWID_B 0x100 + } + RW_SHARED 36K { # Will be force updated on recovery. + SHARED_DATA 4K # 4K or less for netboot params. + RW_UNUSED + } + RW_LEGACY(CBFS) 1M # Minimal 1M. +} diff --git a/src/mainboard/google/rauru/devicetree.cb b/src/mainboard/google/rauru/devicetree.cb new file mode 100644 index 0000000000..d2288f4a09 --- /dev/null +++ b/src/mainboard/google/rauru/devicetree.cb @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip soc/mediatek/mt8196 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/google/rauru/mainboard.c b/src/mainboard/google/rauru/mainboard.c new file mode 100644 index 0000000000..af12d21776 --- /dev/null +++ b/src/mainboard/google/rauru/mainboard.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static void mainboard_init(struct device *dev) +{ + /* TODO: add mainboard init */ +} + +static void mainboard_enable(struct device *dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .name = CONFIG_MAINBOARD_PART_NUMBER, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/google/rauru/memlayout.ld b/src/mainboard/google/rauru/memlayout.ld new file mode 100644 index 0000000000..0f1fcec9a0 --- /dev/null +++ b/src/mainboard/google/rauru/memlayout.ld @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include diff --git a/src/mainboard/google/rauru/reset.c b/src/mainboard/google/rauru/reset.c new file mode 100644 index 0000000000..3eb13907b8 --- /dev/null +++ b/src/mainboard/google/rauru/reset.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +void do_board_reset(void) +{ + /* TODO: add reset function when gpio is ready */ +} diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c new file mode 100644 index 0000000000..0db6fd2674 --- /dev/null +++ b/src/mainboard/google/rauru/romstage.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +void platform_romstage_main(void) +{ + /* TODO: add romstage main function */ +} -- cgit v1.2.3