From 1523742d4c23b3d31aac4a17b6bac7c19c8bd3b9 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Wed, 27 Jul 2022 09:56:41 -0600 Subject: mb/google/brya/var/agah: Update ASPM settings for dGPU After some debugging, it has been determined that the ASPM L0s substate is functional, but there is still some problem with ASPM L1 substates, so this patch updates ASPM status for the dGPU from disabled to L0s only. BUG=b:240390998 TEST=tested with nvidia tools Signed-off-by: Tim Wawrzynczak Change-Id: I584bdbf26eda20246034263446492bf4daf5f3b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66198 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Ivy Jian Reviewed-by: Subrata Banik --- src/mainboard/google/brya/variants/agah/overridetree.cb | 2 +- src/mainboard/google/brya/variants/agah/variant.c | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb index 0f50f96712..ae6ad4a22d 100644 --- a/src/mainboard/google/brya/variants/agah/overridetree.cb +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -80,7 +80,7 @@ chip soc/intel/alderlake .clk_req = 0, .clk_src = 0, .flags = PCIE_RP_LTR | PCIE_RP_AER, - .pcie_rp_aspm = ASPM_DISABLE + .pcie_rp_aspm = ASPM_L0S, }" device pci 00.0 alias dgpu on end end diff --git a/src/mainboard/google/brya/variants/agah/variant.c b/src/mainboard/google/brya/variants/agah/variant.c index 437fdc4c51..b0baab356b 100644 --- a/src/mainboard/google/brya/variants/agah/variant.c +++ b/src/mainboard/google/brya/variants/agah/variant.c @@ -132,10 +132,6 @@ static void dgpu_power_sequence_on(void) void variant_init(void) { - /* Disable ASPM for the GPU until it is verified working. */ - struct device *dgpu = DEV_PTR(dgpu); - dgpu->disable_pcie_aspm = 1; - if (acpi_is_wakeup_s3()) return; -- cgit v1.2.3