From 124f53fa9961bf70be719163ffb9a6bb85a9088c Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Fri, 1 Aug 2014 10:59:20 -0700 Subject: samus: Disable CMDPWR on broadwell Workaround for auto shutdown issue on broadwell SKU. Now we can see C7 transition, and MRC fastboot BUG=chrome-os-partner:29787,chrome-os-partner:29117 BRANCH=None TEST=build ok and boot on samus Original-Signed-off-by: Kane Chen Original-Commit-Id: 932152b16c3943b00bd317e7370402dda451529f Original-Change-Id: Id1f174b67fa3e6f248dd8b21aee25e6e01abf33e Original-Reviewed-on: https://chromium-review.googlesource.com/210870 Original-Reviewed-by: Duncan Laurie Original-Tested-by: Kane Chen Original-Commit-Queue: Kane Chen (cherry picked from commit 932152b16c3943b00bd317e7370402dda451529f) Signed-off-by: Marc Jones Change-Id: Ie9fb792635b39d33136cef576ae5559013d5947a Reviewed-on: http://review.coreboot.org/8950 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/samus/romstage.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c index b26cc4ece8..44d712e69e 100644 --- a/src/mainboard/google/samus/romstage.c +++ b/src/mainboard/google/samus/romstage.c @@ -59,8 +59,7 @@ void mainboard_romstage_entry(struct romstage_params *rp) * Disable use of PEI saved data to work around memory issues. */ if (cpu_family_model() == BROADWELL_FAMILY_ULT) { - pei_data.disable_self_refresh = 1; - pei_data.disable_saved_data = 1; + pei_data.disable_cmd_pwr = 1; } /* Initalize memory */ -- cgit v1.2.3