From 0d89e1589ccad3d92c76544bbe4033fe119ec2fc Mon Sep 17 00:00:00 2001 From: Won Chung Date: Mon, 23 May 2022 22:47:02 +0000 Subject: mb/google/brya/var/{primus, primus4es}: Correct _PLD values This patch is to denote the correct value of ACPI _PLD for USB ports. +----------------+ | | | Screen | | | +----------------+ C2 | | A0 C0 | MLB DB | A | | +----------------+ BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Won Chung Change-Id: Ia493fd28c362d2c0c343c2d121f6611cfd8f7f6c Reviewed-on: https://review.coreboot.org/c/coreboot/+/64615 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Subrata Banik Reviewed-by: Eric Lai --- src/mainboard/google/brya/variants/primus/overridetree.cb | 12 ++++++------ src/mainboard/google/brya/variants/primus4es/overridetree.cb | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index 48f8adca4b..c980f1069a 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -327,14 +327,14 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port3 on end end end @@ -347,14 +347,14 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -378,7 +378,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" device ref usb2_port9 on end end chip drivers/usb/acpi @@ -392,7 +392,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" device ref usb3_port1 on end end chip drivers/usb/acpi diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb index bd63a4399a..79faefd779 100644 --- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb @@ -317,14 +317,14 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port3 on end end end @@ -337,14 +337,14 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C2 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -368,7 +368,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" device ref usb2_port9 on end end chip drivers/usb/acpi @@ -382,7 +382,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(1, 2))" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" device ref usb3_port1 on end end chip drivers/usb/acpi -- cgit v1.2.3