From 062fdf13b8b7593c729401a5281087c3a09998d2 Mon Sep 17 00:00:00 2001 From: Sumeet Pawnikar Date: Tue, 22 Jan 2019 18:27:22 +0530 Subject: mb/google/sarien/variants: Set tcc offset value Set tcc offset value to 5 degree celsius for Sarien system. BRANCH=None BUG=b:122636962 TEST=Built and tested on Sarien system Change-Id: I06fbf6a0810028458bdd28d0d8a4e3b645f279ca Signed-off-by: Sumeet Pawnikar Reviewed-on: https://review.coreboot.org/c/31037 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie Reviewed-by: Naresh Solanki --- src/mainboard/google/sarien/variants/arcada/devicetree.cb | 3 +++ src/mainboard/google/sarien/variants/sarien/devicetree.cb | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index af8fe187f3..2b0408e217 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -70,6 +70,9 @@ chip soc/intel/cannonlake #| I2C1 | Touchpad | #| I2C4 | H1 TPM | #+-------------------+---------------------------+ + + register "tcc_offset" = "5" + register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 59f1f30c88..76e5db77f7 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -75,7 +75,7 @@ chip soc/intel/cannonlake #| I2C4 | H1 TPM | #+-------------------+---------------------------+ - register "tcc_offset" = "3" + register "tcc_offset" = "5" register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, -- cgit v1.2.3