From 1d0154cee023d7185436b9a3399d25276a532699 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 23 Jul 2020 19:37:42 +0200 Subject: soc/amd/picasso: don't apply unconfigured USB2 PHY tune parameters Since FSP pre-populates the UPD struct with the non-zero default values, coreboot shouldn't set them to zero in the case that they aren't configured in the board's devicetree. Since all parameters being zero is a valid case, this patch adds another devicetree option that applying the devicetree settings for the USB2 PHY tuning depends on being set. BUG=b:161923068 Change-Id: I66e5811ce64298b0644d2881420634a8ce1379d7 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/43781 Reviewed-by: Aaron Durbin Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb | 2 ++ src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb | 2 ++ 2 files changed, 4 insertions(+) (limited to 'src/mainboard/google/zork') diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index e355b5b14a..4a01a12cc0 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -51,6 +51,8 @@ chip soc/amd/picasso register "xhci0_force_gen1" = "0" + register "has_usb2_phy_tune_params" = "1" + # Controller0 Port0 Default register "usb_2_port_0_tune_params" = "{ .com_pds_tune = 0x03, diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 283e7a07a4..986c444e14 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -51,6 +51,8 @@ chip soc/amd/picasso register "xhci0_force_gen1" = "0" + register "has_usb2_phy_tune_params" = "1" + # Controller0 Port0 Default register "usb_2_port_0_tune_params" = "{ .com_pds_tune = 0x03, -- cgit v1.2.3