From 8302585c152926c086107cdf11f48040d0d873d5 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 22 Jun 2020 10:45:12 -0700 Subject: mb/google/zork: Add support for WiFi power sequencing This change replaces variant_wifi_romstage_gpio_table() with variant_pcie_power_reset_configure() to handle the reset and power sequencing for WiFi devices pre- and post- v3 version of schematics. These are the requirements that need to be satisfied: 1. As per PCI Express M.2 Specification Revision 3.0, Version 1.2, Section 3.1.4 "Power-up Timing", PERST# should stay disabled until `TPVPGL` time duration after device power has stabilized. Value of TPVPGL is implementation specific. 2. For Intel WiFi chip, it is known to get into a bad state if the above requirement is violated and hence requires a power cycle. 3. On pre-v3 schematics: - For both dalboz and trembyle references, GPIO42 drives WIFI_AUX_RESET_L which is pulled up to PP3300_WIFI. - For both dalboz and trembyle references, PP3300_WIFI is controlled using GPIO29. This pad gets pulled high by default on PWRGOOD because of internal pull-up. But, at RESET# it is known to have a glitch. When GPIO29 gets pulled high, it causes WIFI_AUX_RESET_L to be pulled high as well. This violates the PCIe power sequencing requirements. Hence, for pre-v3 schematics on both dalboz and trembyle, following sequence needs to be followed: a. Assert WIFI_AUX_RESET_L. b. Disable power to WiFi. c. Wait 10ms to allow WiFi power to go low. d. Enable power to WiFi. e. Wait 50ms as per PCIe specification. f. Deassert WIFI_AUX_RESET_L. 4. On v3 schematics: - For trembyle: WIFI_AUX_RESET_L is driven by GPIO86 which has an internal PU as well as an external PU to PP3300_WIFI. - For dalboz: WIFI_AUX_RESET is driven by GPIO29. This is active high and has an internal PU. It also has an external 1K PD to overcome internal PU. - For both dalboz and trembyle references, PP3300_WIFI is controlled by GPIO42 which has an internal PU and external PD. Trembyle schematics have a comment saying strong PD of 2.2K but the stuffed resistor is a weak one (499K). ON dalboz, it uses a weak PD (which doesn't look correct and instead should be a strong PD just like trembyle). Having a strong PD ensures that the WiFi power is kept disabled when coming out of G3 until coreboot configures GPIO42 as high. - Thus, for v3 schematics, following sequence needs to be followed: a. Assert WIFI_AUX_RESET{_L} signal. b. Enable power to WiFi. c. Wait 50ms as per PCIe specification. d. Deassert WIFI_AUX_RESET{_L} signal. BUG=b:157686402, b:158257076 TEST=Verified that QCA and AX200 cards both continue working. Tested QCA on Dalboz and Trembyle. Tested AX200 on morphius. Signed-off-by: Furquan Shaikh Change-Id: I532131ee911d5efb5130d8710f3e01578f6c9627 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42738 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- .../google/zork/variants/morphius/Makefile.inc | 2 -- .../google/zork/variants/morphius/romstage.c | 42 ---------------------- 2 files changed, 44 deletions(-) delete mode 100644 src/mainboard/google/zork/variants/morphius/romstage.c (limited to 'src/mainboard/google/zork/variants/morphius') diff --git a/src/mainboard/google/zork/variants/morphius/Makefile.inc b/src/mainboard/google/zork/variants/morphius/Makefile.inc index b1212bcbdd..57e7136ddc 100644 --- a/src/mainboard/google/zork/variants/morphius/Makefile.inc +++ b/src/mainboard/google/zork/variants/morphius/Makefile.inc @@ -2,6 +2,4 @@ subdirs-y += ./spd -romstage-y += ./romstage.c - ramstage-y += gpio.c diff --git a/src/mainboard/google/zork/variants/morphius/romstage.c b/src/mainboard/google/zork/variants/morphius/romstage.c deleted file mode 100644 index 876b836adc..0000000000 --- a/src/mainboard/google/zork/variants/morphius/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -void variant_romstage_entry(void) -{ - //SET WIFI_PCIE_RESET_L HIGH - gpio_set(WIFI_PCIE_RESET_L, 1); - - /* Power the wifi card */ - /* wait 10ms to discharge EN_PWR_WIFI to 0V */ - mdelay(10); - gpio_set(EN_PWR_WIFI, 1); - - /* SET WIFI_PCIE_RESET_L LOW */ - gpio_set(WIFI_PCIE_RESET_L, 0); - - /* Qualcomm Atheros NFA344A needs at least 10ms delay */ - mdelay(10); - - /* SET WIFI_PCIE_RESET_L HIGH */ - gpio_set(WIFI_PCIE_RESET_L, 1); -} - -static const struct soc_amd_gpio morphius_gpio_set_wifi[] = { - /* EN_PWR_WIFI - Power off. Pull high in romstage.c */ - PAD_GPO(GPIO_29, LOW), -}; - -const struct soc_amd_gpio *variant_wifi_romstage_gpio_table(size_t *size) -{ - *size = ARRAY_SIZE(morphius_gpio_set_wifi); - return morphius_gpio_set_wifi; -} -- cgit v1.2.3