From 462f3ed111e049cc95e2ee2ce4f4e88a415cc912 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Thu, 18 Jun 2020 01:44:21 -0700 Subject: mb/google/zork: Update ramstage GPIOs for v3 schematics for dalboz reference This change updates the baseboard GPIO table in ramstage to match v3 version of dalboz reference schematics. All variants using this reference are accordingly updated to configure the GPIOs that changed as part of v3 schematics. BUG=b:157165628, b:157744136, b:157743835 TEST=Compiles Signed-off-by: Martin Roth Signed-off-by: Furquan Shaikh Change-Id: If9d0e35801f9f9b15eddeb4ec7068fed6d401307 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2251394 Commit-Queue: Furquan Shaikh Tested-by: Furquan Shaikh Auto-Submit: Furquan Shaikh Reviewed-by: Eric Peers Reviewed-on: https://review.coreboot.org/c/coreboot/+/42725 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- .../google/zork/variants/baseboard/gpio_baseboard_dalboz.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/mainboard/google/zork/variants/baseboard') diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 3f72015c21..50c842b252 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -103,8 +103,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_4, PULL_UP), /* PEN_POWER_EN - Enabled*/ PAD_GPO(GPIO_5, HIGH), - /* DMIC_SEL */ - PAD_GPO(GPIO_6, LOW), // Select Camera 1 Dmic + /* EN_PWR_TOUCHPAD */ + PAD_GPO(GPIO_6, HIGH), /* I2S_SDIN */ PAD_NF(GPIO_7, ACP_I2S_SDIN, PULL_NONE), /* I2S_LRCLK - Bit banged in depthcharge */ @@ -134,12 +134,12 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_31, PULL_UP), /* */ PAD_GPI(GPIO_32, PULL_DOWN), - /* EN_PWR_TOUCHPAD_PS2 */ + /* DMIC_SEL */ /* - * EN_PWR_TOUCHPAD_PS2 - Make sure Ext ROM Sharing is disabled before - * using this GPIO. Otherwise SPI flash access will be very slow. + * Make sure Ext ROM Sharing is disabled before using this GPIO. Otherwise SPI flash + * access will be very slow. */ - PAD_GPO(GPIO_67, HIGH), + PAD_GPO(GPIO_67, LOW), // Select Camera 1 Dmic /* EMMC_RESET */ PAD_GPO(GPIO_68, LOW), /* RAM ID 3*/ -- cgit v1.2.3