From 22d5b071607c301b3e7c563e16b2ecc915f864fd Mon Sep 17 00:00:00 2001 From: Srinidhi N Kaushik Date: Fri, 6 Mar 2020 10:47:17 -0800 Subject: mb/google/volteer: Enable Audio DSP UPD Provide settings for configuring the link between HD-Audio controller and display unit for purposes of HDMI/DP Audio playback. BUG=b:144708516, b:148385924 TEST=none Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/c/coreboot/+/39356 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- .../google/volteer/variants/baseboard/devicetree.cb | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src/mainboard/google/volteer/variants') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index a65e5f1be8..84d121f2b1 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -110,6 +110,21 @@ chip soc/intel/tigerlake [PchSerialIoIndexUART2] = PchSerialIoDisabled, }" + # HD Audio + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkHdaEnable" = "0" + register "PchHdaAudioLinkDmicEnable[0]" = "1" + register "PchHdaAudioLinkDmicEnable[1]" = "1" + register "PchHdaAudioLinkSspEnable[0]" = "1" + register "PchHdaAudioLinkSspEnable[1]" = "1" + # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T + register "PchHdaIDispLinkTmode" = "2" + # iDisp-Link Freq 4: 96MHz, 3: 48MHz. + register "PchHdaIDispLinkFrequency" = "4" + # Not disconnected/enumerable + register "PchHdaIDispCodecDisconnect" = "0" + + # TCSS USB3 register "TcssXhciEn" = "1" -- cgit v1.2.3