From ad8cac34a4c38ba490807395c75698bc20e02523 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 12 Sep 2024 16:01:55 -0500 Subject: mb/google/volteer: Fix USB port definitions Commit bc8f5405b542 ("tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope") not only moved the USB port definitions under the XHCI device reference, but also combined multiple register definitions. In doing so, it broke the inheritance from the baseboard, since the variant overridetree registers now replaced the entire usb2_ports/ usb3_ports structs, rather than replacing individual array elements therein. This resulted in any USB ports inherited from the baseboard and not overridden by the variant being non-functional as they were not included in the resulting combined devicetree. To fix this, return to overriding individual array elements in the usb2/3_ports structs. TEST=build/boot google/drobit. Verify all USB ports present and functional. Verify mainboard/static.c in built shows all ports. Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/84348 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Elyes Haouas --- src/mainboard/google/volteer/variants/voxel/overridetree.cb | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/mainboard/google/volteer/variants/voxel/overridetree.cb') diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index 836753349c..6c237a9899 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -277,10 +277,8 @@ chip soc/intel/tigerlake end end device ref south_xhci on - register "usb2_ports" = "{ - [3] = USB2_PORT_TYPE_C(OC_SKIP), // Type-A / Type-C Cl - [8] = USB2_PORT_TYPE_C(OC_SKIP), // Type-A / Type-C C0 - }" + register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C Cl + register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C C0 chip drivers/usb/acpi device ref xhci_root_hub on -- cgit v1.2.3