From ff1c5bec03cd2fe442ead488c62643ae38952037 Mon Sep 17 00:00:00 2001 From: Alex Levin Date: Thu, 23 Jul 2020 11:55:12 -0700 Subject: mb/google/volteer: Add gpio-keys ACPI node for PENH Use gpio_keys driver to add ACPI node for pen eject event. Also setting gpio wake pin for wake events. Removal and insertion (both edges) triggers IRQ and only removal is a wake event (rising edge). Adding for both Volteer and Volteer2 variants. BUG=b:146083964 BRANCH=None TEST=tested on a Volteer Change-Id: Ida3217a5b156320856ce3302c2623eba2230f28d Signed-off-by: Alex Levin Reviewed-on: https://review.coreboot.org/c/coreboot/+/43764 Reviewed-by: Aaron Durbin Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- .../google/volteer/variants/volteer2/overridetree.cb | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/mainboard/google/volteer/variants/volteer2/overridetree.cb') diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index c32b80e9ec..9c78b94c90 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -67,6 +67,19 @@ chip soc/intel/tigerlake register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end + chip drivers/generic/gpio_keys + register "name" = ""PENH"" + # GPP_B3 is the IRQ source, and GPP_E1 is the wake source + register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_B3)" + register "key.wake_gpe" = "GPE0_DW2_01" + register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" + register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + register "key.dev_name" = ""EJCT"" + register "key.linux_code" = "SW_PEN_INSERTED" + register "key.linux_input_type" = "EV_SW" + register "key.label" = ""pen_eject"" + device generic 0 on end + end end # I2C1 0xA0E9 device pci 15.2 on chip drivers/i2c/sx9310 -- cgit v1.2.3