From bc8f5405b542eef35a71e5189d71654cbe134558 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Thu, 27 Jun 2024 22:58:52 +0200 Subject: tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope Change-Id: Ide5126c6e642ca16249efeaf46321724f2ddce9a Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83245 Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- src/mainboard/google/volteer/variants/voema/overridetree.cb | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/mainboard/google/volteer/variants/voema/overridetree.cb') diff --git a/src/mainboard/google/volteer/variants/voema/overridetree.cb b/src/mainboard/google/volteer/variants/voema/overridetree.cb index 4c83c7e42d..97160ee269 100644 --- a/src/mainboard/google/volteer/variants/voema/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voema/overridetree.cb @@ -5,9 +5,6 @@ chip soc/intel/tigerlake # and controller 1 channel 0 and 1. register "CmdMirror" = "0x00000033" - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C Port 1 - register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C Port 0 - register "TcssAuxOri" = "1" register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" @@ -159,6 +156,11 @@ chip soc/intel/tigerlake end end device ref south_xhci on + register "usb2_ports" = "{ + [2] = USB2_PORT_TYPE_C(OC_SKIP), // Type-A / Type-C Port 1 + [4] = USB2_PORT_TYPE_C(OC_SKIP), // Type-A / Type-C Port 0 + }" + chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi -- cgit v1.2.3