From 1cfc3a68e2b60a12bf76cb2f835def40d8cd3fb2 Mon Sep 17 00:00:00 2001 From: Kevin Chang Date: Wed, 16 Dec 2020 11:25:16 +0800 Subject: mb/google/volteer/variant/lindar: Add SSD D3 cold support This patch add SSD D3 cold support for lindar. BUG=b:172405687 BRANCH=firmware-volteer-13521.B TEST=Built and booted into OS. Signed-off-by: Kevin Chang Change-Id: Ie343bbff3bde4ff2a7e89bd384d5661af372b560 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48651 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/volteer/variants/lindar/overridetree.cb | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/mainboard/google/volteer/variants/lindar') diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb index 70e432d55a..d3be955626 100644 --- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb +++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb @@ -157,6 +157,14 @@ chip soc/intel/tigerlake device pnp 0c09.0 on end end end + device ref pcie_rp9 on + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A22)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + register "srcclk_pin" = "0" + device generic 0 on end + end + end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. -- cgit v1.2.3