From 52000631141b0437dec82e7a408d3e834db9e259 Mon Sep 17 00:00:00 2001 From: nick_xr_chen Date: Thu, 10 Sep 2020 18:53:31 +0800 Subject: mb/google/volteer/variants/eldrid: Configure DP_HPD as PAD_NC GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function (NF1) without internal pull-down which wrongly presents HPD interrupts. This change configures GPP_A19 and GPP_A20 to be no connection and disables DdiPort1Hpd and DdiPort2Hpd. BUG=b:165893624, b:168090618 Signed-off-by: nick_xr_chen Change-Id: I31b25be1c9248debf855435c7b688b358e2cd57e Reviewed-on: https://review.coreboot.org/c/coreboot/+/45246 Reviewed-by: Scott Chao Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/mainboard/google/volteer/variants/eldrid/overridetree.cb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard/google/volteer/variants/eldrid/overridetree.cb') diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 171e3978dc..b04b1e7295 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -1,6 +1,8 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" register "IomTypeCPortPadCfg[0]" = "0x090E000A" register "IomTypeCPortPadCfg[1]" = "0x090E000D" #+-------------------+---------------------------+ -- cgit v1.2.3