From bc8f5405b542eef35a71e5189d71654cbe134558 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Thu, 27 Jun 2024 22:58:52 +0200 Subject: tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope Change-Id: Ide5126c6e642ca16249efeaf46321724f2ddce9a Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83245 Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- .../google/volteer/variants/collis/overridetree.cb | 23 +++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) (limited to 'src/mainboard/google/volteer/variants/collis/overridetree.cb') diff --git a/src/mainboard/google/volteer/variants/collis/overridetree.cb b/src/mainboard/google/volteer/variants/collis/overridetree.cb index a50274f66f..ab4137e590 100644 --- a/src/mainboard/google/volteer/variants/collis/overridetree.cb +++ b/src/mainboard/google/volteer/variants/collis/overridetree.cb @@ -15,15 +15,6 @@ chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC1)" # Type-A Port A0 - register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-A Port A1 - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port C1 - register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Front Camera - register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # Type-C Port C0 - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # WFC Camera - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type-A Port A0 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type-A Port A1 - # Disable SRCCLKREQ1# register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED" @@ -248,6 +239,20 @@ chip soc/intel/tigerlake end end device ref south_xhci on + register "usb2_ports" = "{ + [0] = USB2_PORT_TYPE_C(OC1), // Type-A Port A0 + [1] = USB2_PORT_TYPE_C(OC2), // Type-A Port A1 + [2] = USB2_PORT_TYPE_C(OC0), // Type-C Port C1 + [3] = USB2_PORT_MID(OC_SKIP), // Front Camera + [4] = USB2_PORT_TYPE_C(OC3), // Type-C Port C0 + [5] = USB2_PORT_MID(OC_SKIP), // WFC Camera + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC1), // USB3/2 Type-A Port A0 + [1] = USB3_PORT_DEFAULT(OC2), // USB3/2 Type-A Port A1 + }" + chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi -- cgit v1.2.3