From 1a621507098a16de167f2904aa2f9f23e9bff800 Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Mon, 20 Jul 2020 15:44:59 +0530 Subject: soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU Set power limits in devicetree for Tiger Lake Y-SKU based volteer variant boards. BUG=b:152639350 BRANCH=None TEST=Built and tested power limits on volteer variant board. Change-Id: If4f1226473b48365e5962df9fff29910c99007fc Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/43607 Reviewed-by: Tim Wawrzynczak Reviewed-by: Caveh Jalali Tested-by: build bot (Jenkins) --- .../google/volteer/variants/baseboard/devicetree.cb | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src/mainboard/google/volteer/variants/baseboard') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index e0d3beaaa2..0e8ad3e17a 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -211,15 +211,25 @@ chip soc/intel/tigerlake # Enable DPTF register "dptf_enable" = "1" + register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 38, + .tdp_pl4 = 71, + }" register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ .tdp_pl1_override = 15, .tdp_pl2_override = 60, .tdp_pl4 = 105, }" - register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{ - .tdp_pl1_override = 15, - .tdp_pl2_override = 38, - .tdp_pl4 = 71, + register "power_limits_config[POWER_LIMITS_Y_2_CORE]" = "{ + .tdp_pl1_override = 9, + .tdp_pl2_override = 35, + .tdp_pl4 = 66, + }" + register "power_limits_config[POWER_LIMITS_Y_4_CORE]" = "{ + .tdp_pl1_override = 9, + .tdp_pl2_override = 40, + .tdp_pl4 = 83, }" register "Device4Enable" = "1" -- cgit v1.2.3