From f5b33c00166f0e4511de07f0f6ecd639237c5cc2 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Tue, 19 May 2020 15:29:07 -0700 Subject: mb/google/volteer: Enable D3HotEnable and D3ColdEnable for Volteer This explicitly enables both of TCSS D3HotEnable and D3ColdEnable from Volteer devicetree.cb setting. BUG=:b:146624360 TEST=Built and booted on Volteer. Signed-off-by: John Zhao Change-Id: I1a168ad87169c0f6633704c55c9293aa25710188 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41547 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Wonkyu Kim --- src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 693369542b..02060bdf45 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -136,6 +136,10 @@ chip soc/intel/tigerlake register "IomTypeCPortPadCfg[7]" = "0x0" + # D3Hot and D3Cold for TCSS + register "TcssD3HotEnable" = "1" + register "TcssD3ColdEnable" = "1" + # DP port register "DdiPortAConfig" = "1" # eDP register "DdiPortBConfig" = "0" -- cgit v1.2.3