From f446b81f8fc9247d393edb2447f0afbd2829a637 Mon Sep 17 00:00:00 2001 From: nick_xr_chen Date: Tue, 30 Jun 2020 09:34:33 +0800 Subject: mb/google/volteer: Enable HotPlug on PCIe root port for the SD express Enable HotPlug for the PCIe root port that the SD express is on so the OS can re-train the link without needing a reboot if it goes down unexpectedly at runtime. BUG=b:156879564 BRANCH=master TEST=enable HotPlug on Volteer Root Port 7 (SD express) and check in linux that it is identified as a HotPlug capable root port Signed-off-by: Nick Chen Change-Id: Ie9d427dd297567f06123119a670b5ed2e1f73701 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42897 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 300fb7e729..88aff01c0a 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -86,6 +86,7 @@ chip soc/intel/tigerlake # Enable SD Card PCIE 8 using clk 3 register "PcieRpEnable[7]" = "1" register "PcieRpLtrEnable[7]" = "1" + register "PcieRpHotPlug[7]" = "1" register "PcieClkSrcUsage[3]" = "7" register "PcieClkSrcClkReq[3]" = "3" -- cgit v1.2.3