From b30fe36734df3c48ec35438052ee8b28bf7a6a44 Mon Sep 17 00:00:00 2001 From: Srinidhi N Kaushik Date: Wed, 20 May 2020 11:55:36 -0700 Subject: soc/intel/tigerlake: Remove MIPI clock setting from devicetree In Tiger Lake we have support for enabling MIPI clocks at runtime in ACPI. Hence remove setting pch_islclk from devcietree and chip.h. Also update functions which reference pch_isclk. BUG=b:148884060 Branch=None Test=build and boot volteer and verify camera functionality Signed-off-by: Srinidhi N Kaushik Change-Id: I6b3399172c43b4afa4267873ddd8ccf8d417ca16 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41570 Reviewed-by: Furquan Shaikh Reviewed-by: Wonkyu Kim Tested-by: build bot (Jenkins) --- src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 02060bdf45..c6a2e8b1a6 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -32,9 +32,6 @@ chip soc/intel/tigerlake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 Camera - # Enable Pch iSCLK - register "pch_isclk" = "1" - # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201" -- cgit v1.2.3