From e6883a3d9b198ccc9a2fc6d724f41e689aa6d1d6 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Mon, 29 Jun 2015 14:27:23 -0700 Subject: veyron_*: Set vop_mode in devicetree.cb files This avoids any ambiguity or breakage in case the vop_modes get shuffled around or changed in some future patch or copy+paste job. Brain and Rialto need some more work done so their devicetree.cb files will be updated in follow-up patches. BUG=none BRANCH=none TEST=compiled only (for danger, jerry, mickey, romy, speedy) Change-Id: I4fd549c82c8a5c31525c4e485fa8df73f33f2049 Signed-off-by: Patrick Georgi Original-Commit-Id: bd88973b53949058331613c7582650fbd4ea48db Original-Change-Id: I47da45c5fd9648544392de8d76f86af812de9093 Original-Signed-off-by: David Hendricks Original-Reviewed-on: https://chromium-review.googlesource.com/282610 Original-Reviewed-by: Julius Werner Reviewed-on: http://review.coreboot.org/10776 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/veyron_romy/devicetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/veyron_romy') diff --git a/src/mainboard/google/veyron_romy/devicetree.cb b/src/mainboard/google/veyron_romy/devicetree.cb index 4c2ea8f709..64f1779106 100644 --- a/src/mainboard/google/veyron_romy/devicetree.cb +++ b/src/mainboard/google/veyron_romy/devicetree.cb @@ -21,5 +21,6 @@ chip soc/rockchip/rk3288 device cpu_cluster 0 on end register "vop_id" = "1" + register "vop_mode" = "VOP_MODE_AUTO_DETECT" register "framebuffer_bits_per_pixel" = "16" end -- cgit v1.2.3