From 55009af42c39f413c49503670ce9bc2858974962 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Mon, 2 Dec 2019 22:03:27 -0800 Subject: Change all clrsetbits_leXX() to clrsetbitsXX() This patch changes all existing instances of clrsetbits_leXX() to the new endian-independent clrsetbitsXX(), after double-checking that they're all in SoC-specific code operating on CPU registers and not actually trying to make an endian conversion. This patch was created by running sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g' across the codebase and cleaning up formatting a bit. Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin --- src/mainboard/google/veyron_mickey/bootblock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/veyron_mickey/bootblock.c') diff --git a/src/mainboard/google/veyron_mickey/bootblock.c b/src/mainboard/google/veyron_mickey/bootblock.c index 1107b1a6a4..ec55f7e452 100644 --- a/src/mainboard/google/veyron_mickey/bootblock.c +++ b/src/mainboard/google/veyron_mickey/bootblock.c @@ -44,8 +44,8 @@ void bootblock_mainboard_init(void) gpio_output(GPIO(7, A, 0), 1); /* Power LED */ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ - setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); - setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); + setbits32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); + setbits32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); assert(CONFIG_PMIC_BUS == 0); /* must correspond with IOMUX */ i2c_init(CONFIG_PMIC_BUS, 400*KHz); -- cgit v1.2.3