From 08e842c0d10c69b8fc07f6b00ea4dbeb85ac6e58 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 11 Aug 2016 14:40:09 -0500 Subject: Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS Provide a default value of 0 in drivers/spi as there weren't default values aside from specific mainboards and arch/x86. Remove any default 0 values while noting to keep the option's default to 0. BUG=chrome-os-partner:56151 Change-Id: If9ef585e011a46b5cd152a03e41d545b36355a61 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/16192 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Martin Roth --- src/mainboard/google/veyron_emile/bootblock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/veyron_emile/bootblock.c') diff --git a/src/mainboard/google/veyron_emile/bootblock.c b/src/mainboard/google/veyron_emile/bootblock.c index 2fe913e067..726127564c 100644 --- a/src/mainboard/google/veyron_emile/bootblock.c +++ b/src/mainboard/google/veyron_emile/bootblock.c @@ -66,7 +66,7 @@ void bootblock_mainboard_init(void) /* spi2 for firmware ROM */ write32(&rk3288_grf->iomux_spi2csclk, IOMUX_SPI2_CSCLK); write32(&rk3288_grf->iomux_spi2txrx, IOMUX_SPI2_TXRX); - rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 24750*KHz); + rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 24750*KHz); setup_chromeos_gpios(); } -- cgit v1.2.3