From 2f37bd65518865688b9234afce0d467508d6f465 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:51:15 -0800 Subject: arm(64): Globally replace writel(v, a) with write32(a, v) This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/veyron_danger/bootblock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/google/veyron_danger/bootblock.c') diff --git a/src/mainboard/google/veyron_danger/bootblock.c b/src/mainboard/google/veyron_danger/bootblock.c index 68234c9609..678059f954 100644 --- a/src/mainboard/google/veyron_danger/bootblock.c +++ b/src/mainboard/google/veyron_danger/bootblock.c @@ -38,7 +38,7 @@ void bootblock_mainboard_early_init() { if (IS_ENABLED(CONFIG_DRIVERS_UART)) { assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE); - writel(IOMUX_UART2, &rk3288_grf->iomux_uart2); + write32(&rk3288_grf->iomux_uart2, IOMUX_UART2); } } @@ -64,12 +64,12 @@ void bootblock_mainboard_init(void) rkclk_configure_cpu(); /* i2c1 for tpm */ - writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1); + write32(&rk3288_grf->iomux_i2c1, IOMUX_I2C1); i2c_init(1, 400*KHz); /* spi2 for firmware ROM */ - writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk); - writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx); + write32(&rk3288_grf->iomux_spi2csclk, IOMUX_SPI2_CSCLK); + write32(&rk3288_grf->iomux_spi2txrx, IOMUX_SPI2_TXRX); rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11*MHz); setup_chromeos_gpios(); -- cgit v1.2.3