From 55c753d3a948fc06d8ccbc3cef678ef2e71f616f Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Thu, 25 Apr 2013 16:14:19 +0800 Subject: arm/exynos: Allow DRAM controller to be initialized without clearing RAM content. To support suspend/resume, PHY control must be reset only on normal boot path. So add a new param "mem_reset" to specify that. Verified to boot successfully on Google/Snow. Change-Id: Id49bc6c6239cf71a67ba091092dd3ebf18e83e33 Signed-off-by: Hung-Te Lin Reviewed-on: http://review.coreboot.org/3128 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/google/snow/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/snow') diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 41b88e1e5f..edbe00919f 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -184,7 +184,7 @@ void main(void) mem->mpll_mdiv, mem->frequency_mhz); - ret = ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE); + ret = ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, 1); if (ret) { printk(BIOS_ERR, "Memory controller init failed, err: %x\n", ret); -- cgit v1.2.3