From d04957970cc55743db3d896b3975570b42f05d95 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 2 Sep 2020 19:01:24 +0200 Subject: nb/intel/haswell: Drop `gpu_panel_port_select` The corresponding bits in PP_ON_DELAYS are reserved MBZ. Change-Id: Icd2554c928a5908dfb354b81d3e6c5b5f242f1d1 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45034 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/google/slippy/variants/leon/overridetree.cb | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/google/slippy/variants/leon/overridetree.cb') diff --git a/src/mainboard/google/slippy/variants/leon/overridetree.cb b/src/mainboard/google/slippy/variants/leon/overridetree.cb index f3b5c4a257..6dee38e36e 100644 --- a/src/mainboard/google/slippy/variants/leon/overridetree.cb +++ b/src/mainboard/google/slippy/variants/leon/overridetree.cb @@ -1,7 +1,6 @@ chip northbridge/intel/haswell - # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms -- cgit v1.2.3