From 4b2e04a53bf6b4efc9354793bb10312bc7f77baa Mon Sep 17 00:00:00 2001 From: Jon Murphy Date: Thu, 17 Feb 2022 14:54:46 -0700 Subject: mb/google/skyrim: Enable console UART BUG=b:214414501 TEST=builds Signed-off-by: Jon Murphy Change-Id: I053909ab73c1aa053f35a505b37571ff23adde89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62147 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Karthik Ramasubramanian --- src/mainboard/google/skyrim/Kconfig | 1 + src/mainboard/google/skyrim/variants/baseboard/devicetree.cb | 1 + 2 files changed, 2 insertions(+) (limited to 'src/mainboard/google/skyrim') diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 5f5b8b5226..c5b81f79c9 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -16,6 +16,7 @@ config AMD_FWM_POSITION_INDEX config BOARD_SPECIFIC_OPTIONS def_bool y + select AMD_SOC_CONSOLE_UART select BOARD_ROMSIZE_KB_16384 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_ESPI diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index 04e0b51f27..d6652978ba 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -7,4 +7,5 @@ chip soc/amd/sabrina end end end # domain + device ref uart_0 on end # UART0 end # chip soc/amd/sabrina -- cgit v1.2.3