From b1ae6ca7ef8b848e53577cb9da46c19d2d5886a8 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sat, 31 Aug 2024 10:57:18 +0200 Subject: tree: Use boolean for s0ix_enable Change-Id: Id0ab5e641684e03da555a127808c0def5a53cbe6 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/84159 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/google/sarien/variants/arcada/devicetree.cb | 2 +- src/mainboard/google/sarien/variants/sarien/devicetree.cb | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/sarien') diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index fcaa730240..7eec7a8724 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -27,7 +27,7 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "s0ix_enable" = "1" + register "s0ix_enable" = "true" register "dptf_enable" = "1" register "satapwroptimize" = "1" register "power_limits_config" = "{ diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 589ea1c3aa..d10fd1f2e6 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -30,7 +30,7 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "s0ix_enable" = "1" + register "s0ix_enable" = "true" register "dptf_enable" = "1" register "satapwroptimize" = "1" register "AcousticNoiseMitigation" = "1" -- cgit v1.2.3