From 0c0a9810c7d00524a8bcebacc36496b590de3a79 Mon Sep 17 00:00:00 2001
From: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Date: Mon, 29 Apr 2019 15:17:06 +0800
Subject: mb/google/sarien: Turn off camera power when s0ix

Turn off camera power when s0ix for power saving.

BUG=b:129177593
TEST= measure camera power comsumption is 0mV under s0ix

Change-Id: I5a9b7ec1e95cc9931d8d5f2dc1254805c9d0ffed
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
---
 src/mainboard/google/sarien/dsdt.asl               |  2 ++
 .../arcada/include/variant/acpi/mainboard.asl      | 28 ++++++++++++++++++++++
 .../sarien/include/variant/acpi/mainboard.asl      | 28 ++++++++++++++++++++++
 3 files changed, 58 insertions(+)
 create mode 100644 src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
 create mode 100644 src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl

(limited to 'src/mainboard/google/sarien')

diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl
index e5b0ccad2e..58e0704deb 100644
--- a/src/mainboard/google/sarien/dsdt.asl
+++ b/src/mainboard/google/sarien/dsdt.asl
@@ -40,6 +40,8 @@ DefinitionBlock(
 			#include <soc/intel/cannonlake/acpi/northbridge.asl>
 			#include <soc/intel/cannonlake/acpi/southbridge.asl>
 		}
+		/* Per board variant mainboard hooks. */
+		#include <variant/acpi/mainboard.asl>
 	}
 
 #if CONFIG(CHROMEOS)
diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
new file mode 100644
index 0000000000..7b252c7f1c
--- /dev/null
+++ b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define CAM_EN GPP_B11 /* Active low */
+
+/* Method called from LPIT prior to enter s0ix state */
+Method (MS0X, 1)
+{
+	If (Arg0) {
+		/* Turn off camera power */
+		\_SB.PCI0.STXS (CAM_EN)
+	} Else {
+		/* Turn on camera power */
+		\_SB.PCI0.CTXS (CAM_EN)
+	}
+}
diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
new file mode 100644
index 0000000000..7b252c7f1c
--- /dev/null
+++ b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define CAM_EN GPP_B11 /* Active low */
+
+/* Method called from LPIT prior to enter s0ix state */
+Method (MS0X, 1)
+{
+	If (Arg0) {
+		/* Turn off camera power */
+		\_SB.PCI0.STXS (CAM_EN)
+	} Else {
+		/* Turn on camera power */
+		\_SB.PCI0.CTXS (CAM_EN)
+	}
+}
-- 
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