From 211e391a8295d48495ba5e4ebcde11ec85ed317f Mon Sep 17 00:00:00 2001 From: Sukumar Ghorai Date: Thu, 6 Jul 2023 15:23:32 -0700 Subject: mb/{google, intel}: Enable PCH Energy Reporting for MTL platforms This patch enables PCH to CPU energy report feature which can be used by Intel Telemetry Driver. BUG=b:269563588 TEST=Able to build and boot google/rex and perform below check to ensure the energy reporting is correct w/o this cl: # lspci -s 00:14.2 -vvv | grep "Region 0" Region 0: Memory at 957f8000 (64-bit, non-prefetchable) [size=16K] # iotools mmio_read32 0x957f8068 #i.e., 104th offset 0xXXXX0000 w/ this cl: #lspci -s 00:14.2 -vvv | grep "Region 0" Region 0: Memory at 957f8000 (64-bit, non-prefetchable) [size=16K] # iotools mmio_read32 0x957f8068 #i.e., 104th offset 0xXXXXfc004 Change-Id: I9bd4625ea311a05071878aaec68433a1ba018c0d Signed-off-by: Sukumar Ghorai Reviewed-on: https://review.coreboot.org/c/coreboot/+/76353 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Sridhar Siricilla --- src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb | 3 +++ src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src/mainboard/google/rex/variants') diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb index 4297c8714a..25befb4dd4 100644 --- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb @@ -33,6 +33,9 @@ chip soc/intel/meteorlake # S0ix enable register "s0ix_enable" = "1" + # Enable Energy Reporting + register "pch_pm_energy_report_enable" = "1" + # DPTF enable register "dptf_enable" = "1" diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index 1b37784bcd..57a5288261 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -33,6 +33,9 @@ chip soc/intel/meteorlake # S0ix enable register "s0ix_enable" = "1" + # Enable Energy Reporting + register "pch_pm_energy_report_enable" = "1" + # DPTF enable register "dptf_enable" = "1" -- cgit v1.2.3