From 01e3c32f3638e44dfc18f0c3b262598055444289 Mon Sep 17 00:00:00 2001
From: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Date: Wed, 27 Sep 2023 13:17:39 +0800
Subject: mb/google/rex/var/karis: Modify TCC_offset to 10

Follow thermal team request, modify tcc_offset from 20 to 10.

BUG=b:306548525
TEST=Build and verified by thermal team

Change-Id: I7537e103be4cd1196c934ca72dbd61e064aed371
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
---
 src/mainboard/google/rex/variants/karis/overridetree.cb | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/mainboard/google/rex/variants')

diff --git a/src/mainboard/google/rex/variants/karis/overridetree.cb b/src/mainboard/google/rex/variants/karis/overridetree.cb
index 09e8a3dab0..0c0e7fa441 100644
--- a/src/mainboard/google/rex/variants/karis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/karis/overridetree.cb
@@ -72,6 +72,8 @@ chip soc/intel/meteorlake
 		[PchSerialIoIndexI2C5] = PchSerialIoPci,
 	}"
 
+	register "tcc_offset" = "10"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |
-- 
cgit v1.2.3