From 82007619129abe7928e0bd2a88602d156406675e Mon Sep 17 00:00:00 2001
From: Freddy Paul <freddy.paul@intel.com>
Date: Wed, 15 Jun 2016 22:50:13 -0700
Subject: google/reef: Add ACPI code for trackpad

This patch enlists ELAN trackpad on I2C4 for reef board.

BUG=None
TEST=Build and boot to OS.
     Ensure ELAN trackpad is working with ELAN trackpad driver enabled
     in kernel.

Change-Id: I788600f16dea9fac0e089cb82ccfc38a960157f9
Signed-off-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-on: https://review.coreboot.org/15213
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/mainboard/google/reef/acpi/mainboard.asl | 44 ++++++++++++++++++++++++++++
 src/mainboard/google/reef/gpio.h             |  5 ++++
 2 files changed, 49 insertions(+)

(limited to 'src/mainboard/google/reef')

diff --git a/src/mainboard/google/reef/acpi/mainboard.asl b/src/mainboard/google/reef/acpi/mainboard.asl
index 06b2efc9ac..5471488085 100644
--- a/src/mainboard/google/reef/acpi/mainboard.asl
+++ b/src/mainboard/google/reef/acpi/mainboard.asl
@@ -14,6 +14,7 @@
  */
 
 #include "acpi/superio.asl"
+#include "../gpio.h"
 
 Scope (\_SB)
 {
@@ -32,6 +33,49 @@ Scope (\_SB)
 	}
 }
 
+Scope (\_SB.PCI0.I2C4)
+{
+	/* Standard Mode: HCNT, LCNT, SDA Hold Register */
+	/* SDA Hold register value of 40 indicates
+	 * sda hold time of 0.3us for ic_clk of 133MHz
+	 */
+	Name (SSCN, Package () { 0, 0, 40 })
+
+	/* Fast Mode: HCNT, LCNT, SDA Hold Register */
+	/* SDA Hold register value of 40 indicates
+	 * sda hold time of 0.3us for ic_clk of 133MHz
+	 */
+	Name (FMCN, Package () { 0, 0, 40 })
+
+	Device (ETPA)
+	{
+		Name (_HID, "ELAN0000")
+		Name (_DDN, "Elan Touchpad")
+		Name (_UID, 1)
+		Name (ISTP, 1) /* Touchpad */
+
+		Name (_CRS, ResourceTemplate()
+		{
+			I2cSerialBus (
+				0x15,                     // SlaveAddress
+				ControllerInitiated,      // SlaveMode
+				400000,                   // ConnectionSpeed
+				AddressingMode7Bit,       // AddressingMode
+				"\\_SB.PCI0.I2C4",        // ResourceSource
+			)
+			Interrupt (ResourceConsumer, Edge, ActiveLow)
+			{
+				TOUCHPAD_INT
+			}
+		})
+
+		Method (_STA)
+		{
+			Return (0xF)
+		}
+	}
+}
+
 /*
  * LPC Trusted Platform Module
  */
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index 506633b2e7..23628eb15f 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -18,6 +18,10 @@
 
 #include <soc/gpio.h>
 
+/* Input device interrupt configuration */
+#define TOUCHPAD_INT		GPIO_18_IRQ
+
+#ifndef __ACPI__
 /*
  * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
  * table found in EDS vol 1, but some pins aren't grouped functionally in
@@ -339,4 +343,5 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_GPI(GPIO_75, UP_20K, DEEP),	 /* I2S1_BCLK -- PCH_WP */
 };
 
+#endif /* __ACPI__ */
 #endif /* MAINBOARD_GPIO_H */
-- 
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