From 5f662e9f752314248e9b0d4e6cc0067b65730768 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 13 Feb 2022 13:20:17 -0600 Subject: mb/google/reef: Disable unused devices in devicetrees The image processing unit (Iunit) and SoC UARTS are not used on any reef boards. Change-Id: Iacdf93b4952cbc63fc465f07d440463106527b8d Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/74891 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Eric Lai --- src/mainboard/google/reef/variants/coral/devicetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/google/reef/variants/coral') diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index f1d6030854..9e44d86591 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -124,7 +124,7 @@ chip soc/intel/apollolake device pci 02.0 on # - Gen register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device pci 03.0 on end # - Iunit + device pci 03.0 off end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI @@ -238,8 +238,8 @@ chip soc/intel/apollolake device pci 17.2 off end # - I2C 6 device pci 17.3 off end # - I2C 7 device pci 18.0 on end # - UART 0 - device pci 18.1 on end # - UART 1 - device pci 18.2 on end # - UART 2 + device pci 18.1 off end # - UART 1 + device pci 18.2 off end # - UART 2 device pci 18.3 off end # - UART 3 device pci 19.0 on end # - SPI 0 device pci 19.1 off end # - SPI 1 -- cgit v1.2.3