From 8ba64cd608e4e88e8ca34e04132cc0f39a1af5a2 Mon Sep 17 00:00:00 2001 From: Alexis Savery Date: Wed, 30 Aug 2023 20:11:34 +0000 Subject: google/puff: Enable ASPM of RTL8111H With kernel 5.15, puff hangs during power idle tests because the NIC does not enter ASPM L1.2. We add "enable_aspm_l1_2" in devicetree for RTL8111H to enable ASPM L1.2. BUG=b:268859220, b:279618219 TEST=emerge and run power.Idle Change-Id: I129dfd79e8112191453be513b2e3a260429b3030 Signed-off-by: Alexis Savery Reviewed-on: https://review.coreboot.org/c/coreboot/+/77570 Reviewed-by: Sam McNally Reviewed-by: Martin L Roth Tested-by: build bot (Jenkins) --- src/mainboard/google/puff/variants/noibat/overridetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/puff/variants/noibat/overridetree.cb') diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb index c6768a43d8..29f0fa2b9e 100644 --- a/src/mainboard/google/puff/variants/noibat/overridetree.cb +++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb @@ -365,6 +365,7 @@ chip soc/intel/cannonlake register "customized_leds" = "0x05af" register "wake" = "GPE0_DW1_07" # GPP_C7 register "device_index" = "0" + register "enable_aspm_l1_2" = "1" device pci 00.0 on end end register "PcieRpSlotImplemented[6]" = "1" -- cgit v1.2.3