From aff69be254096a3a9d630551780c5610b7db15fa Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sat, 25 Jul 2020 13:37:17 +0200 Subject: soc/intel/skylake: Enable eMMC depending on devicetree configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently eMMC gets enabled by the option ScsEmmcEnabled, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the eMMC controller. I checked all corresponding mainboards if the devicetree configuration matches the ScsEmmcEnabled setting. Change-Id: I3b86ff6e2f15991fb304b71d90c1b959cb6fcf43 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/43862 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 1 - src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nami/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 1 - src/mainboard/google/poppy/variants/rammus/devicetree.cb | 1 - src/mainboard/google/poppy/variants/soraka/devicetree.cb | 1 - 7 files changed, 7 deletions(-) (limited to 'src/mainboard/google/poppy') diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 0f67de1d48..fafd0c1ac1 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "1" register "SaImguEnable" = "1" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index e53a7b565d..7c5c33278b 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "1" register "SaImguEnable" = "1" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 172f402a3a..19a8cf721e 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "0" register "SaImguEnable" = "0" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 94e2229daf..dc133b6954 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "1" register "SaImguEnable" = "1" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 0e2d7c9094..cc72e7730f 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "1" register "SaImguEnable" = "1" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 28a852ff6a..ada2be83e8 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "0" register "SaImguEnable" = "0" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 83e4638925..b0ddef6801 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "1" register "SaImguEnable" = "1" - register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" -- cgit v1.2.3