From 52919523c14396a8a5dffa34afe40b24b7d68dfc Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Wed, 29 Jul 2020 21:44:36 +0200 Subject: soc/intel/skylake: Enable SDXC depending on devicetree configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently, SDXC gets enabled by the option ScsSdCardEnabled, but this duplicates the devicetree on/off options. Therefore, depend on the devicetree for the enablement of the SDXC controller. All corresponding mainboards were checked if the devicetree configuration matches the ScsSdCardEnabled setting, and missing entries were added. Change-Id: I298b7d0b0fe2a7346dbadcea4be22dc67fce4de8 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/44028 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 1 - src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nami/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 1 - src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 1 - src/mainboard/google/poppy/variants/rammus/devicetree.cb | 1 - src/mainboard/google/poppy/variants/soraka/devicetree.cb | 1 - 7 files changed, 7 deletions(-) (limited to 'src/mainboard/google/poppy/variants') diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index eae98356cb..73f8281d64 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index ea6267f699..8c638bad0c 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 98568f8d8d..851e240ddb 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/skylake register "Cio2Enable" = "0" register "SaImguEnable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 43d6509ebb..e4f31123b5 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 2bd82a9cfe..c7540e95ac 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index ef5cd1b008..0c221af2d2 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Cio2Enable" = "0" register "SaImguEnable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index e5307c22cd..af501561af 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" -- cgit v1.2.3