From 97c5464443306f26b61cec3a0f50108a5c06b7ef Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Sun, 10 May 2020 01:24:11 +0530 Subject: skylake: update processor power limits configuration Update processor power limit configuration parameters based on common code base support for Intel Skylake SoC based platforms. BRANCH=None BUG=None TEST=Built and tested on nami system Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45 Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/poppy/variants/nocturne/mainboard.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/poppy/variants/nocturne/mainboard.c') diff --git a/src/mainboard/google/poppy/variants/nocturne/mainboard.c b/src/mainboard/google/poppy/variants/nocturne/mainboard.c index 8d72144f9b..1482b3458f 100644 --- a/src/mainboard/google/poppy/variants/nocturne/mainboard.c +++ b/src/mainboard/google/poppy/variants/nocturne/mainboard.c @@ -5,6 +5,7 @@ #include #include #include +#include /* PL2 limit in watts for AML and KBL */ #define PL2_AML 18 @@ -26,8 +27,10 @@ static uint32_t get_pl2(void) /* Override dev tree settings per board */ void variant_devtree_update(void) { + struct soc_power_limits_config *soc_conf; config_t *cfg = config_of_soc(); + soc_conf = &cfg->power_limits_config; /* Update PL2 based on CPU */ - cfg->tdp_pl2_override = get_pl2(); + soc_conf->tdp_pl2_override = get_pl2(); } -- cgit v1.2.3