From ce23d4c6f179358bf84cbdfa678d0435ae3b4cbe Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 4 Jun 2018 10:05:07 +0530 Subject: soc/intel/skylake: Add option to skip coreboot MP init This patch provides option for mainboard to skip coreboot MP initialization if required based on use_fsp_mp_init. Option for mainboard to skip coreboot MP initialization * 0 = Make use of coreboot MP Init * 1 = Make use of FSP MP Init Default coreboot does MP initialization. Change-Id: I8de24e662963f4600209ad1b110dc950ecfb3a27 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/26818 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/google/poppy/variants/nocturne/devicetree.cb') diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 91e8b46cf1..78edcc9faf 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" - register "FspSkipMpInit" = "1" register "SaGv" = "3" register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms -- cgit v1.2.3