From e5a9e60fc5ca4a4cb000e6992090ab7b0acd9d05 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Fri, 15 Jun 2018 10:20:25 +0900 Subject: mb/google/poppy/variants/nautilus: Configure for 2nd nautilus SKU For supporting new SKU, we need to override GPIO table and device configuration. The board ID of 2nd SKU of nautilus is started from 9, so we would determine SKU with it. BUG=b:80052672 BRANCH=poppy TEST=emerge-nautilus coreboot Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/27147 Reviewed-by: Enrico Granata Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/poppy/variants/nautilus/devicetree.cb') diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 79bb5fbe27..8de2413fcf 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -177,7 +177,7 @@ chip soc/intel/skylake register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 1 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 2 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port - register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # LTE module # Intel Common SoC Config #+-------------------+---------------------------+ -- cgit v1.2.3