From dec6d4e8c74e4bdd53018e6ae505bd56578035c6 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 9 Jun 2017 17:59:07 -0700 Subject: mainboard/google/{poppy,soraka}: Enable generation of SPI TPM ACPI node Now that we dynamically disable TPM interface based on config options, add support for generation of SPI TPM ACPI node if SPI TPM is used. Change-Id: I87d28a42b48ba916c70e45a061c5efd91a8a59bf Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20142 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/poppy/variants/baseboard') diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 7872a83f3e..ad8dfc25ab 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -428,7 +428,14 @@ chip soc/intel/skylake device pci 1d.3 off end # PCI Express Port 12 device pci 1e.0 on end # UART #0 device pci 1e.1 off end # UART #1 - device pci 1e.2 on end # GSPI #0 + device pci 1e.2 on + chip drivers/spi/acpi + register "hid" = "ACPI_DT_NAMESPACE_HID" + register "compat_string" = ""google,cr50"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" + device spi 0 on end + end + end # GSPI #0 device pci 1e.3 on end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO -- cgit v1.2.3