From c76e53ce30a13f77c0f3282a649ca4bfd84dede8 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Mon, 3 Sep 2018 20:25:50 +0900 Subject: mb/google/poppy/variants/nautilus: Bump VCC_SA voltage offset 75mV Nautilus-Wifi with m3 AP got a halt issue during CTS test. Nautilus-Wifi was FCS with Celeron AP first and also its PCB/BOM was validated only with Celeron. Since Celeron deos not support turbo boost mode, its steady power demend and lower CPU frequency may not reflect the potential noise hidden inside the board. Bumping VCC_SA voltage offset 75mV confirmed works to mitigate the potential noise coupling to VCC_GT/SA, and we verified this change makes this issue go away on Nautilus-Wifi board. Nautilus-LTE doesn't show this issue, since it has 10L PCB, will have better grounding and less noise/ripple than 8L PCB. BUG=b:111417632 BRANCH=poppy TEST=Verified CTS test pass without an issue. Change-Id: Id13fcc36a5b6ed42620c66f57a7303f30bff1a50 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/28439 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/google/poppy/romstage.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/google/poppy/romstage.c') diff --git a/src/mainboard/google/poppy/romstage.c b/src/mainboard/google/poppy/romstage.c index af4f70b4a3..bac1e17889 100644 --- a/src/mainboard/google/poppy/romstage.c +++ b/src/mainboard/google/poppy/romstage.c @@ -173,4 +173,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data(p.type, p.use_sec_spd); mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; mem_cfg->MemorySpdDataLen = spd_info[p.type].len; + + mem_cfg->SaOcSupport = p.enable_sa_oc_support; + mem_cfg->SaVoltageOffset = p.sa_voltage_offset_val; } -- cgit v1.2.3