From 5edbea02d480fd9e1e117475ee52a70ca7a85ecc Mon Sep 17 00:00:00 2001
From: Seunghwan Kim <sh_.kim@samsung.com>
Date: Tue, 12 Feb 2019 11:12:34 +0900
Subject: mb/google/octopus/casta: Tune usb2eye setting

It needs to tune usb2eye setting for these ports:
 USB2[4] - type-c port
 USB2[6] - camera

BUG=b:122878632
BRANCH=octopus
TEST=built and passed usb2eye SI test

Change-Id: Iaa3adaab2f391e95730b141dc0237ca62c459e5a
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Reviewed-on: https://review.coreboot.org/c/31359
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 .../google/octopus/variants/casta/overridetree.cb      | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'src/mainboard/google/octopus')

diff --git a/src/mainboard/google/octopus/variants/casta/overridetree.cb b/src/mainboard/google/octopus/variants/casta/overridetree.cb
index d70a6ea3f9..dc9c9118af 100644
--- a/src/mainboard/google/octopus/variants/casta/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/casta/overridetree.cb
@@ -1,4 +1,22 @@
 chip soc/intel/apollolake
+	# Override USB2 PER PORT register (PORT 4)
+	register "usb2eye[4]" = "{
+		.Usb20OverrideEn = 1,
+		.Usb20PerPortPeTxiSet = 7,
+		.Usb20PerPortTxiSet = 3,
+		.Usb20IUsbTxEmphasisEn = 3,
+		.Usb20PerPortTxPeHalf = 0,
+	}"
+
+	# Override USB2 PER PORT register (PORT 6)
+	register "usb2eye[6]" = "{
+		.Usb20OverrideEn = 1,
+		.Usb20PerPortPeTxiSet = 3,
+		.Usb20PerPortTxiSet = 0,
+		.Usb20IUsbTxEmphasisEn = 3,
+		.Usb20PerPortTxPeHalf = 0,
+	}"
+
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+
 	#| Field             |  Value                    |
-- 
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