From f059e97cc8887cc28987d92fc00604f62c456824 Mon Sep 17 00:00:00 2001 From: "jun.gao" Date: Thu, 17 Dec 2015 16:59:55 +0800 Subject: google/oak: Initialize i2c bus timing register for TPM and external buck BRANCH=none BUG=none TEST=build pass and boot to oak kernel Change-Id: Id2c3bbb70a1de54a56ee04ecda76178b1bdf1a4d Signed-off-by: Patrick Georgi Original-Commit-Id: 8641689e008c58e909606c225dddb81dc6457ae9 Original-Change-Id: I96ef8a36bc70594097e9df964934b7e3eca5d5f9 Original-Signed-off-by: jun.gao Original-Reviewed-on: https://chromium-review.googlesource.com/319031 Original-Commit-Ready: Yidi Lin Original-Tested-by: Yidi Lin Original-Reviewed-by: Julius Werner Reviewed-on: https://review.coreboot.org/13108 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/oak/bootblock.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/google/oak/bootblock.c') diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c index efb489fb15..49cf5ddf65 100644 --- a/src/mainboard/google/oak/bootblock.c +++ b/src/mainboard/google/oak/bootblock.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -78,6 +79,9 @@ void bootblock_mainboard_init(void) /* set nor related GPIO */ nor_set_gpio_pinmux(); + /* Init i2c bus 2 Timing register for TPM */ + mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS); + mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz); setup_chromeos_gpios(); -- cgit v1.2.3