From 026be3d76f3934eb901485acd98e0d84f137068f Mon Sep 17 00:00:00 2001 From: Mengqi Zhang Date: Wed, 24 Apr 2019 11:11:52 +0800 Subject: mediatek: Add SPI tick_dly setting Add spi tick_dly setting for high-speed spi xfer. BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; emerge-elm coreboot Change-Id: Ie49fc3efe2a4a6dcdf2a2fc4c91b47e35d4f086e Signed-off-by: Mengqi Zhang Reviewed-on: https://review.coreboot.org/c/coreboot/+/32461 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/mainboard/google/oak/bootblock.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/oak/bootblock.c') diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c index 3c50389914..89169ef0bf 100644 --- a/src/mainboard/google/oak/bootblock.c +++ b/src/mainboard/google/oak/bootblock.c @@ -89,7 +89,8 @@ void bootblock_mainboard_init(void) if (CONFIG(OAK_HAS_TPM2)) gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING); - mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz); + mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz, + 0); setup_chromeos_gpios(); -- cgit v1.2.3