From b19136ff0ba0b72e2bb273dc4660157533f651f3 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 26 Mar 2014 21:58:06 -0700 Subject: nyan: tpm: Increase the TPM frequency to 400 KHz. The TPM now works correctly with the I2C bus running at 400 KHz. Running it at that frequency saves some boot time. CQ-DEPEND=CL:191634 CQ-DEPEND=CL:191793 BUG=chrome-os-partner:27220 TEST=Built and booted on nyan with and without EFS. BRANCH=None Original-Change-Id: I157308c2745342dc1ada4499433004c7ce1c6435 Original-Signed-off-by: Gabe Black Original-Reviewed-on: https://chromium-review.googlesource.com/191813 Original-Reviewed-by: Tom Warren Original-Reviewed-by: Jimmy Zhang Original-Reviewed-by: Gabe Black Original-Tested-by: Gabe Black (cherry picked from commit 39a740d488d8f33ee698805bc2a8438263162cc8) Signed-off-by: Marc Jones Change-Id: I02978407e20cc9d526545157a3a3304729a91010 Reviewed-on: http://review.coreboot.org/7461 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/mainboard/google/nyan/romstage.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'src/mainboard/google/nyan') diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index ee54a50ef7..eeec9bdb56 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -134,12 +134,7 @@ static void configure_ec_spi_bus(void) static void configure_tpm_i2c_bus(void) { - /* - * The TPM is on I2C3 and can theoretically run at 400 KHz but doesn't - * seem to work above around 40 KHz. It's set to run at 100 KHz in the - * kernel. - */ - clock_configure_i2c_scl_freq(i2c3, PLLP, 40); + clock_configure_i2c_scl_freq(i2c3, PLLP, 400); i2c_init(2); } -- cgit v1.2.3