From 92dfa9c5814e7f0bb7830166a2fd7f2f04e336cb Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 7 Apr 2014 01:19:27 -0700 Subject: nyan*: Reduce the EC SPI bus frequency to 3 MHz. The EC doesn't seem to be able to handle its bus running at 4 MHz or higher. To avoid it not being able to keep up, we reduce the frequency of that bus on all nyan derivatives to 3 MHz. Because PLLP can't be divided that low, we switch the clock source to CLKM. BUG=chrome-os-partner:22849 TEST=Built and booted on nyan. BRANCH=None Original-Change-Id: I8f31b41098d64634427b4686f5333012f643fada Original-Signed-off-by: Gabe Black Original-Reviewed-on: https://chromium-review.googlesource.com/193349 Original-Commit-Queue: Gabe Black Original-Tested-by: Gabe Black Original-Reviewed-by: Gabe Black (cherry picked from commit c215c50a5bb982b0e671c951e2fe8df06db85db2) Signed-off-by: Marc Jones Change-Id: Ia60513d118aed8881927e9d52f170e27655ea8e7 Reviewed-on: http://review.coreboot.org/7739 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/nyan/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/nyan') diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index eeec9bdb56..7310cc873a 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -129,7 +129,7 @@ static void setup_pinmux(void) static void configure_ec_spi_bus(void) { - clock_configure_source(sbc1, PLLP, 5000); + clock_configure_source(sbc1, CLK_M, 3000); } static void configure_tpm_i2c_bus(void) -- cgit v1.2.3